A common practice in the testing of hardware components involves a process known as burn in. The purpose of a burn in process is to subject the components to a stress test to identify those components that are defective. In many instances, the components may be subjected to higher or more sustained voltages than they would typically experience during operation. Such a burn in process is typically conducted in an environment having an elevated temperature, such as a burn in oven.
To subject the components to a burn in process, the components may be connected to a burn in test system. The burn in test system may comprise a burn in machine, often associated with the burn in oven, and a burn in board. The burn in board may allow a plurality of the components to be connected and subjected to the burn in process at the same time. The burn in machine may then provide and receive one or more signals from the burn in board comprising the connected components.
FIG. 1 illustrates a schematic design of a conventional burn in test system 100 comprising a burn in machine 105, such as a drive board, a comparator board, a burn in board 110, etc. The burn in board 110 comprises a plurality of connected components 115, represented as either rectangles or dots, though not all connected components are illustrated in FIG. 1. The components 115, which may each be referred to as a under testing device (DUT), may be arranged in a series of rows and columns.
As shown in FIG. 1, the burn in machine 105 may provide signals over at least one or more clock channels (CLK) 130, one or more scan channels (SCAN) 132, and one or more input/output channels (I/O) 134 to the burn in board 110. The clock signals may be connected to a component 115 on the end of each column. The component 115 receiving the clock signals may then pass the clock signals to the other components 115 in the same column. Similarly, a subset of the input/output signals may be connected to a component 115 on the end of each row. The component 115 receiving the input/output signals may then pass the input/output signals to the other components 115 in the same row. Additionally, a scan signal may be passed to a component 115 on the end of each column. The component 115 receiving the scan signal may then pass the scan signal to the other components 115 in the same column.
Due to the high degree of signal sharing (i.e., of the clock signals, scan signals, and input/output signals) by the components 115 in the conventional burn in test system 100 of FIG. 1, the system 100 may suffer from undesirably increased rise times (TR) and fall times (TF). Additionally, the signals may be affected by high levels of noise. As a result, the conventional burn in test system 100 may experience difficulty verifying the output data of the components 115. Furthermore, the polling efficiency of the ready/busy signals of the components 115 may be reduced. The output of the burn in test system 100 may also be reduced, therefore, leading to increased cost for the burn in process.
Accordingly, it may be desirable to provide improved burn in boards, systems, and methods for subjecting components to a burn in process that overcomes at least some of the above-mentioned and other disadvantages and deficiencies of conventional technologies.